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1. general description the 74cbtlv16211 provides a dual 12-bit high-speed bus switch with separate output enable inputs (1oe , 2oe ). the low on-state resistance of the switch allows connections to be made with minimal propagation delay. the switch is disabled (high-impedance off-state) when the output enable (noe ) input is high. to ensure the high-impedance off-stat e during power-up or power-down, 1oe and 2oe should be tied to the v cc through a pull-up resistor. the minimum value of the resistor is determined by the current-sinking capability of the driver. schmitt trigger action at control input makes t he circuit tolerant to slower input rise and fall times across the entire v cc range from 2.3 v to 3.6 v. this device is fully specified for pa rtial power-down ap plications using i off . the i off circuitry disables the output, preventin g the damaging backflow current through the device when it is powered down. 2. features and benefits ? supply voltage range from 2.3 v to 3.6 v ? high noise immunity ? complies with jedec standard: ? jesd8-5 (2.3 v to 2.7 v) ? jesd8-b/jesd36 (2.7 v to 3.6 v) ? esd protection: ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v ? cdm aec-q100-011 revision b exceeds 1000 v ? 5 ? switch connection between two ports ? rail to rail switching on data i/o ports ? cmos low power consumption ? latch-up performance exceeds 250 ma per jesd78b class i level a ? i off circuitry provides partial power-down mode operation ? tssop56 packages: sot364-1 and sot481-2 ? specified from ? 40 ? cto+85 ? c and ? 40 ? cto+125 ? c 74cbtlv16211 24-bit bus switch rev. 5 ? 30 december 2010 product data sheet
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 2 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch 3. ordering information 4. functional diagram table 1. ordering information type number package temperature range name description version 74cbtlv16211dgg ? 40 ? c to +125 ? c tssop56 plastic thin shrink small outline package; 56 leads; body width 6.1 mm sot364-1 74cbtlv16211dgv ? 40 ? c to +125 ? c tssop56 plastic thin shrink small outline package; 56 leads; body width 4.4 mm sot481-2 fig 1. logic symbol 001aai097 1a0 1b0 1oe 56 23456791011121314 54 53 52 51 50 48 47 46 45 44 43 42 1a1 1b1 1a2 1b2 1a3 1b3 1a4 1b4 1a5 1b5 1a6 1b6 1a7 1b7 1a8 1b8 1a9 1b9 1a10 1b10 1a11 1b11 2a0 2b0 2oe 55 15 16 18 20 21 22 23 24 25 26 27 28 41 40 39 37 36 35 34 33 32 31 30 29 2a1 2b1 2a2 2b2 2a3 2b3 2a4 2b4 2a5 2b5 2a6 2b6 2a7 2b7 2a8 2b8 2a9 2b9 2a10 2b10 2a11 2b11 fig 2. logic diagram (one switch) 001aai099 nan nbn noe
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 3 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch 5. pinning information 5.1 pinning 5.2 pin description fig 3. pin configuration (sot364-1 and sot481-2) 74cbtlv16211 n.c. 1oe 1a0 2oe 1a1 1b0 1a2 1b1 1a3 1b2 1a4 1b3 1a5 1b4 gnd gnd 1a6 1b5 1a7 1b6 1a8 1b7 1a9 1b8 1a10 1b9 1a11 1b10 2a0 1b11 2a1 2b0 v cc 2b1 2a2 2b2 gnd gnd 2a3 2b3 2a4 2b4 2a5 2b5 2a6 2b6 2a7 2b7 2a8 2b8 2a9 2b9 2a10 2b10 2a11 2b11 001aai100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 table 2. pin description symbol pin description n.c. 1 not connected 1a0 to 1a11 2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 14 independent input or output 2a0 to 2a11 15, 16, 18, 20, 21, 22, 23, 24, 25, 26, 27, 28 independent input or output gnd 8, 19, 38, 49 ground (0 v) v cc 17 supply voltage 2b0 to 2b11 41, 40, 39, 37, 36, 35, 34, 33, 32, 31, 30, 29 independent input or output
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 4 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch 6. functional description [1] h = high voltage level; l = low voltage level. 7. limiting values [1] the minimum input and output voltage ratings may be exceed ed if the input and output current ratings are observed. [2] for tssop56 packages: above 55 ? c the value of p tot derates linearly with 8.0 mw/k. 8. recommended operating conditions [1] applies to control signal levels. 1b0 to 1b11 54, 53, 52, 51, 50, 48, 47, 46, 45, 44, 43, 42 independent input or output 2oe 55 output enable input (active-low) 1oe 56 output enable input (active-low) table 2. pin description ?continued symbol pin description table 3. function table [1] output enable input oe function switch l on-state hoff-state table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +4.6 v v i input voltage [1] ? 0.5 +4.6 v v sw switch voltage enable and disable mode [1] ? 0.5 v cc + 0.5 v i ik input clamping current v i < ? 0.5 v ? 50 - ma i sk switch clamping current v i < ? 0.5 v ? 50 - ma i sw switch current v sw = 0 v to v cc - ? 128 ma i cc supply current - +100 ma i gnd ground current ? 100 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? cto+125? c [2] - 600 mw table 5. recommended operating conditions symbol parameter conditions min max unit v cc supply voltage 2.3 3.6 v v i input voltage 0 3.6 v v sw switch voltage enable and disable mode 0 v cc v t amb ambient temperature ? 40 +125 ?c ? t/ ? v input transition rise and fall rate v cc = 2.3 v to 3.6 v [1] 0 200 ns/v
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 5 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch 9. static characteristics [1] all typical values are measured at t amb =25 ? c. [2] one input at 3 v, other inputs at v cc or gnd. 9.1 test circuits table 6. static characteristics at recommended operating conditions voltages are referenced to gnd (ground = 0 v). symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min max v ih high-level input voltage v cc = 2.3 v to 2.7 v 1.7 - - 1.7 - v v cc = 3.0 v to 3.6 v 2.0 - - 2.0 - v v il low-level input voltage v cc = 2.3 v to 2.7 v - - 0.7 - 0.7 v v cc = 3.0 v to 3.6 v - - 0.9 - 0.9 v i i input leakage current pin noe ; v i = gnd to v cc ; v cc =3.6v -- ? 1.0 - ? 20 ? a i s(off) off-state leakage current v cc = 3.6 v; see figure 4 -- ? 1- ? 20 ? a i s(on) on-state leakage current v cc = 3.6 v; see figure 5 -- ? 1- ? 20 ? a i off power-off leakage current v i or v o = 0 v to 3.6 v; v cc =0v -- ? 10 - ? 50 ? a i cc supply current v i = gnd or v cc ; i o = 0 a; v sw =gndorv cc ; v cc =3.6v --10 - 50 ? a ? i cc additional supply current pin noe ; v i =v cc ? 0.6 v; v sw =gndorv cc ; v cc =3.6v [2] - - 300 - 2000 ? a c i input capacitance pin noe ; v cc = 3.3 v; v i =0vto3.3 v -0.9- - -pf c s(off) off-state capacitance v cc = 3.3 v; v i =0vto3.3 v - 5.2 - - - pf c s(on) on-state capacitance v cc = 3.3 v; v i = 0 v to 3.3 v - 14.3 - - - pf v i = v cc or gnd and v o = gnd or v cc .v i = v cc or gnd and v o = open circuit. fig 4. test circuit for measuring off-state leakage current (one channel) fig 5. test circuit for measuring on-state leakage current (one channel) 001aam032 nbn noe v ih nan gnd v cc v l v o i s a i s a 001aam033 nan noe v il nbn gnd v cc v l v o i s a
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 6 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch 9.2 on resistance [1] typical values are measured at t amb =25 ? c and nominal v cc . [2] measured by the voltage drop between the a and b terminals at the indicated current through the switch. on-state resistance is determined by the lower of the voltages of the two (a or b) terminals. 9.3 on resistance test circuit and graphs table 7. resistance r on at recommended operating conditions; voltages are refe renced to gnd (ground = 0 v); for test circuit see figure 6 . symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ? c unit min typ [1] max min max r on on resistance v cc = 2.3 v to 2.7 v; see figure 7 to figure 9 [2] i sw =64ma; v i = 0 v - 4.2 8.0 - 15.0 ? i sw =24 ma; v i = 0 v - 4.2 8.0 - 15.0 ? i sw = 15 ma; v i = 1.7 v - 8.4 40 - 60.0 ? v cc = 3.0 v to 3.6 v; see figure 10 to figure 12 i sw =64ma; v i =0v - 4.0 7.0 - 11.0 ? i sw =24 ma; v i =0v - 4.0 7.0 - 11.0 ? i sw = 15 ma; v i = 2.4 v - 6.2 15 - 25.5 ? r on =v sw / i sw .( 1 ) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. fig 6. test circuit for measuring on resistance (one channel) fig 7. on resistance as a function of input voltage; v cc = 2.5 v; i sw = 15 ma 001aam034 nan noe v il nbn gnd v cc v l v sw i sw v v i (v) 0 2.5 2.0 1.0 1.5 0.5 001aai109 7 5 9 11 r on () 3 (1) (3) (4) (2)
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 7 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch (1) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. (1) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. fig 8. on resistance as a function of input voltage; v cc = 2.5 v; i sw = 24 ma fig 9. on resistance as a function of input voltage; v cc = 2.5 v; i sw = 64 ma v i (v) 0 2.5 2.0 1.0 1.5 0.5 001aai110 7 5 9 11 r on () 3 (1) (3) (4) (2) v i (v) 0 2.5 2.0 1.0 1.5 0.5 001aai111 7 5 9 11 r on () 3 (1) (3) (4) (2) (1) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. (1) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. fig 10. on resistance as a function of input voltage; v cc = 3.3 v; i sw = 15 ma fig 11. on resistance as a function of input voltage; v cc = 3.3 v; i sw = 24 ma v i (v) 04 3 12 001aai105 4 6 8 r on () 2 (1) (4) (2) (3) v i (v) 04 3 12 001aai106 4 6 8 r on () 2 (1) (4) (2) (3)
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 8 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch 10. dynamic characteristics [1] all typical values are measured at t amb =25 ? c and at nominal v cc . [2] the propagation delay is the calculated rc time constant of the on-state resistance of the switch and the load capacitance, when driven by an ideal voltage source (zero output impedance). [3] t pd is the same as t plh and t phl . [4] t en is the same as t pzh and t pzl . [5] t dis is the same as t phz and t plz . (1) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. fig 12. on resistance as a function of input voltage; v cc = 3.3 v; i sw = 64 ma v i (v) 04 3 12 001aai107 4.5 3.5 5.5 6.5 7.5 r on () 2.5 (1) (4) (2) (3) table 8. dynamic characteristics gnd = 0 v; for test circuit see figure 15 symbol parameter conditions t amb = ? 40 ? c to +85 ? c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min max t pd propagation delay nan to nbn or nbn to nan; see figure 13 [2] [3] v cc = 2.3 v to 2.7 v - - 0.13 - 0.2 ns v cc = 3.0 v to 3.6 v - - 0.2 - 0.31 ns t en enable time noe to nan or nbn; see figure 14 [4] v cc = 2.3 v to 2.7 v 1.0 2.0 7.0 1.0 7.8 ns v cc = 3.0 v to 3.6 v 1.0 1.7 6.2 1.0 6.8 ns t dis disable time noe to nan or nbn; see figure 14 [5] v cc = 2.3 v to 2.7 v 1.0 2.6 7.2 1.0 8.1 ns v cc = 3.0 v to 3.6 v 1.0 3.0 7.7 1.0 8.8 ns
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 9 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch 11. waveforms measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 13. the data input (nan or nbn) to output (nbn or nan) propagation delays 001aai367 v m v m v m v m v i input 0 v v oh output v ol t phl t plh table 9. measurement points supply voltage input output v cc v m v i t r = t f v m v x v y 2.3 v to 2.7 v 0.5v cc v cc ? 2.0 ns 0.5v cc v ol +0.15v v oh ? 0.15 v 3.0 v to 3.6 v 0.5v cc v cc ? 2.0 ns 0.5v cc v ol +0.3v v oh ? 0.3 v measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 14. enable and disable times v i v ol v oh gnd noe input output low-to-off off-to-low output high-to-off off-to-high gnd switch enabled switch enabled 001aak860 switch disabled v cc v m v m v m v x v y t plz t phz t pzh t pzl
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 10 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch test data is given in table 10 . definitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 15. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l g table 10. test data supply voltage load v ext v cc c l r l t plh , t phl t pzh , t phz t pzl , t plz 2.3 v to 2.7 v 30 pf 500 ? open gnd 2v cc 3.0 v to 3.6 v 50 pf 500 ? open gnd 2v cc
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 11 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch 12. package outline fig 16. package outline sot364-1 (tssop56) unit a 1 a 2 a 3 b p cd (1) e (2) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.2 0.1 8 0 o o 0.1 dimensions (mm are the original dimensions). notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. sot364-1 99-12-27 03-02-19 w m 12 8 56 29 y pin 1 index b h 1.05 0.85 0.28 0.17 0.2 0.1 14.1 13.9 6.2 6.0 0.5 1 8.3 7.9 0.50 0.35 0.5 0.1 0.08 0.25 0.8 0.4 p e v m a a tssop56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm sot364-1 a max. 1.2 0 2.5 5 mm scale mo-153
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 12 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch fig 17. package outline sot481-2 (tssop56) unit a 1 a 2 a 3 b p d (1) e (2) h e l p cel z (1) ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 1.05 0.80 0.23 0.13 0.20 0.09 11.4 11.2 4.5 4.3 6.6 6.2 0.4 8 0 o o 0.07 0.08 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.75 0.45 sot481-2 mo-194 - - - - - - 01-11-24 0.25 0.4 0.1 w m b p e 12 8 56 29 z pin 1 index tssop56: plastic thin shrink small outline package; 56 leads; body width 4.4 mm sot481-2 a max. 1.2
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 13 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch 13. abbreviations 14. revision history table 11. abbreviations acronym description cdm charged device model cmos complementary metal-oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mm machine model table 12. revision history document id release date data sheet status change notice supersedes 74cbtlv16211 v.5 20101230 product data sheet - 74cbtlv16211 v.4 modifications: ? section 7 : conditions and limits corrected for i sk (errata). 74cbtlv16211 v.4 20100816 product data sheet - 74cbtlv16211 v.3 modifications: ? figure 4 to figure 6 changed: na changed into nan. 74cbtlv16211 v.3 20100112 product data sheet - 74cbtlv16211 v.2 74cbtlv16211 v.2 20090826 product data sheet - 74cbtlv16211 v.1 74cbtlv16211 v.1 20080620 product data sheet - -
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 14 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 15.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 15.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qua lified for use in automotive applications. the product is not desi gned, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be ex pected to result in personal injury, death or severe property or environmental dam age. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74cbtlv16211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 5 ? 30 december 2010 15 of 16 nxp semiconductors 74cbtlv16211 24-bit bus switch export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from national authorities. 15.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74cbtlv16211 24-bit bus switch ? nxp b.v. 2010. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 30 december 2010 document identifier: 74cbtlv16211 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 functional description . . . . . . . . . . . . . . . . . . . 4 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 recommended operating conditions. . . . . . . . 4 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 9.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 9.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 9.3 on resistance test circuit and graphs. . . . . . . . 6 10 dynamic characteristics . . . . . . . . . . . . . . . . . . 8 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 14 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 15.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 15.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 16 contact information. . . . . . . . . . . . . . . . . . . . . 15 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

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